Hi @b4sus. Thanks for your PR.

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Hey @b4sus , thanks for the contribution!

Can you provide a sample pipeline that illustrates the issue this pr is aiming to resolve?

At least in the case of a component being re-used, I believe the taskname will have a -# suffix, so should already be distinguished from repeated earlier calls. For parallelFor I'd be interested of its impact with #10798

cc @gmfrasca

@HumairAK - This appears to only impact output artifacts, and only changes the driver behavior when in CONTAINER driver mode, so I don't believe this should have any effect on #10798 in terms of sub-DAG naming schemes, etc.

With that said, I did see that ParallelFor outputs are storing artifacts in the same URI, which is a problem that this PR addresses by adding UUID salts.

Hey @HumairAK ,

We noticed the problem when, from one pipeline, we started other pipelines (pipeline as component) using ParallelFor. This is roughly the code:

@dsl.pipeline
def inner_pipeline(date_to_process: str):
    comp1_task = component1(date_to_process = date_to_process)
    comp2_task = component2(comp1_task.outputs["output_df"])

@dsl.pipeline
def main_pipeline(from_date: str, to_date: str):
    prepare_dates_task = prepare_dates_component(from_date = from_date, to_date = to_date)

    with dsl.ParallelFor(items = prepare_dates_task.output, parallelism=4) as date_to_process:
        inner_ppln_task = inner_pipeline(date_to_process = date_to_process)

In this case, many inner pipelines were started (more then 4 as parallelism is not yet supported) and problem was that output of component1 was/is written to the same minio location, so overwriting each other. And subsequently couple of component2 tasks get the same input, regardless of the argument (date_to_process), producing the same final output (not visible here in code as it is store directly in component).

Perfect, thanks guys

tested and works as well with the following pipeline:

from typing import List

from kfp import dsl, compiler
from kfp.dsl import Dataset
from kfp.dsl import Output, InputPath

@dsl.component(base_image="quay.io/opendatahub/ds-pipelines-ci-executor-image:v1.0")
def component1(date_to_process: str, output_df: Output[Dataset]):
    with open(output_df.path, 'w') as f:
        f.write(date_to_process)

@dsl.component(base_image="quay.io/opendatahub/ds-pipelines-ci-executor-image:v1.0")
def component2(dataset_in: InputPath('Dataset')):
    with open(dataset_in, 'r') as input_file:
        dataset_one_contents = input_file.read()
    print(dataset_one_contents)

@dsl.component(base_image="quay.io/opendatahub/ds-pipelines-ci-executor-image:v1.0")
def prepare_dates_component() -> List[str]:
    return ["1", "2", "3", "4", "5", "6"]

@dsl.pipeline
def inner_pipeline(date_to_process: str):
    comp1_task = component1(date_to_process = date_to_process).set_caching_options(enable_caching=False)
    comp2_task = component2(dataset_in = comp1_task.outputs["output_df"]).set_caching_options(enable_caching=False)

@dsl.pipeline
def main_pipeline():
    prepare_dates_task = prepare_dates_component().set_caching_options(enable_caching=False)

    with dsl.ParallelFor(items = prepare_dates_task.output, parallelism=4) as date_to_process:
        inner_ppln_task = inner_pipeline(date_to_process = date_to_process)


if __name__ == '__main__':
    compiler.Compiler().compile(main_pipeline, __file__ + '.yaml')

before:

after:

/lgtm
/approve

[APPROVALNOTIFIER] This PR is APPROVED

This pull-request has been approved by: HumairAK

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